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This case study describes the development of a 10.1-inch industrial HMI terminal based on NXP i.MX 8M Mini application processor, operating an embedded Linux stack created using Yocto along with a Qt 6 application.
It serves the purpose of exemplifying all four pillars of E-E-A-T namely Experience, Expertise, Authoritativeness, and Trustworthiness, enabling the claims to be backed by evidence, assessment, official documentation, and genuine limitations instead of marketing. Evidence mapping of each pillar is provided at the end.
Three candidates were evaluated against the requirement set (10.1" 1280×800 display, capacitive touch, two CAN buses, Gigabit Ethernet, fanless −20 °C to +70 °C operation, 7-year availability):
| Candidate | Strengths | Disqualifying or Costly Factor |
|---|---|---|
| i.MX 6ULL (MCIMX6Y2) | Low cost, low power | Cortex-A7 only, no GPU capable of smooth QML, no MIPI DSI |
| i.MX 8M Mini (MIMX8MM6DVTLZAA) | Quad Cortex-A53 @ 1.8 GHz + Cortex-M4F @ 400 MHz GC NanoUltra 3D 4-lane MIPI DSI 1× GbE 14×14 mm FCBGA | No native CAN and no native LVDS, both require external bridges |
| i.MX 8M Plus (MIMX8ML8) | Adds 2× CAN-FD, ISP, 2.3 TOPS NPU | ~35% higher unit cost; over-provisioned for a non-vision HMI |
The i.MX 8M Mini was chosen. The fact that it does not support native CAN was a non-issue as an MCP2518FD SPI-CAN controller can be added easily at an affordable price; This choice is explained in section.
This issue was properly documented in the design log and was not skipped over as a part of the principle of reliability, as it saved a costly re-engineering later required by a customer who needed LVDS.
The design utilized a 200-pin SODIMM-form-factor system-on-module (2 GB LPDDR4, 16 GB eMMC 5.1, PCA9450 PMIC) combined with a bespoke four-layer carrier board.
This separation made the carrier design cycle nine weeks long and separated the DDR high-speed routing that we did not want to qualify on our own from our process.
The carrier board carried: a 24 V→5 V wide-input buck (LM5164), 5 V→3.3 V/1.8 V rails, an MCP2518FD CAN-FD controller with a TCAN1044 transceiver, a Gigabit Ethernet PHY with magnetics and TVS, an isolated RS-485 port (ADM2582E), an external watchdog (TPS3813), and an I²C RTC with a supercapacitor backup.
Skill. Every interface with the field was isolated from ground and made safe against IEC 61000-4-2/4/5. The 24 V DC network had common mode suppression and use of a TVS array; the CAN/RS-485 ports had isolated DC-DC converters whose operation would result in the field ground transients not reaching the SOM ground plane across the converter.
The display panel involved a 10.1-inch 1280×800 IPS TFT with a 4-lane MIPI DSI system. It was decided to evaluate two systems as i.MX 8M Mini's DSI was its only speed display output while the legacy specification of the customer had been to use LVDS:
The DSI panel was selected for the first prototype; however, the footprint of the SN65DSI83 was stored in it so the DSI variant could be selected later without having to change the board.
Lessons from the experience (what went wrong). The first version of the prototype showed intermittent dw-mipi-dsi timeout error and random flickering of the screen. Signal quality issue on a 200 mm unshielded FFC was found to be the reason of the problem: the DSI clock lane was emitting signals and there was not enough termination of the data lanes.
The Goodix GT911 capacitive controller is connected via I²C3 using the address of 0x5D, which comes with its own interrupt and reset GPIOs. The first samples were giving false touches when the backlight boost converter was on.
The solving of the problem turned out to be a matter of layout and not software – the I²C line was moved away from the boost inductor, a 100 nF capacitor was included in the connector, and the return path was shortened. A solution using filtering in the firmware would not have worked as successfully due to compromised EMC margin.
Using a PWM-backlight node allowed the LED driver to operate from PWM1 at 20 kHz, which is above the audible spectrum. Brightness control functions can be used via sysfs and through the Qt application for automatic dimming.
The development was completed using an NXP i.MX BSP based on the Yocto Project 5.0 (Scarthgap) LTS release and utilizing the 6.6 downstream kernel. In accordance with the i.MX Yocto Project User's Guide and i.MX Linux Reference Manual, the layer stack consists of meta-imx (meta-imx-bsp and meta-imx-sdk), meta-freescale, meta-qt6, and a custom layer meta-hmi.
With respect to the custom layer, we configured a new machine (imx8mm-hmi), in addition to developing recipes for the kernel and U-Boot.
Two image recipes were also developed, with our final image based on imx-image-multimedia. Unlike core-image-minimal, we found the NXP image to minimize risks of development. We ultimately chose fsl-imx-wayland as our distro, with the final image featuring Weston, Vivante userspace GPU as well as Qt 6.6 LTS.
The device tree for this board (imx8mm-hmi.dts) outlines the specifications for the panel, touch controller, backlighting system, CAN controller, RTC, and watchdog. Here are some of the notable specifications:
It must be noted that only one slightly modified external patch was needed for the DSI timing and it was kept as .bbappend file together with notes that it would be sent to upstream developers.
The HMI app has been written using Qt 6.6 with QML and was operating on Weston in kiosk mode. The initial cold-boot-to-first-frame time was 11.2 seconds which was too long for a machine startup process.
Using systemd-analyze and bootgraph revealed three main problems: delays with U-Boot, a lengthy kernel initcall chain, and serialized booting of Weston/Qt.
After implementing silent U-Boot, removing unnecessary drivers, postponing some non-critical systemd units, and preloading the QML cache, the boot time was reduced to 4.8 seconds, which is a 57% improvement in the real value, not the estimate of cost.
Deterministic I/O has been implemented using Cortex-M4F core of the i.MX 8M Mini running FreeRTOS, which has been communicating with Linux via RPMsg.
This approach allowed for the safety-related interlocks to work independently of Linux scheduling latency and is a common practice for the industrial HMI designs.
Security was viewed as an obligation and not an innovative capability. We implemented HABv4 in the i.MX 8M Mini microprocessor using SRK hash on the fused chip, along with signing of U-Boot, kernel, and DTB images with the help of NXP Code Signing Tools.
The root file system was mounted as read-only so that files could not be modified, while overlayfs was used to maintain writeable status, which minimized susceptibility to attack and reduced eMMC wear.
Over-The-Air updates have been implemented using RAUC, with A/B slots, where signed packages were written to inactive slots, verified, and utilized in the next boot, enabling rollback ability in case of an unsuccessful boot. Furthermore, packages were transferred using HTTPS protocol with the use of pinning certificates.
| Parameter | Result | Notes |
|---|---|---|
| Cold boot to first frame | 4.8 s | Optimized from 11.2 s |
| Idle power (12 V input) | 4.1 W | Display at 60% brightness |
| Full-load power | 6.3 W | Qt/QML animation + CAN traffic |
| SOM junction temp, 60 °C ambient | 78 °C | Fanless, 15×15 mm heatsink |
| ESD (contact) | ±8 kV | IEC 61000-4-2, no functional upset |
| EFT (power/I-O) | ±2 kV | IEC 61000-4-4, criterion A |
The following restrictions must be clarified.
The terminal was in line with its purpose and with environmental needs and got into production. However, the most valuable outcome was not the terminal itself but the decision record.
It was the one that, having explained why i.MX 8M Mini was selected instead of 8M Plus, what was the purpose of having an LVDS footprint reserved, and where the design does not hold up took care of an artifact that other engineers could trust and audit in the future.
That is what distinguishes a robust engineering case from a product brochure rather than any specification.
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