STM32-Based BLDC Motor Controller Development with Real-Time Control Firmware

This case study provides a description about the design and development of a 1 kW, 48 V three-phase brushless DC (BLDC) motor controller primarily required for industrial fan and pump applications.

The required motor is a BLDC machine with six poles operating at 6000 RPM with 3.5 N•m of continuous torque, fitted with three Hall-effect position sensors.

The controller had to deliver speed accuracy up to ±0.5% from the reference values, ripple torque below 5%, efficiency of more than 92%, and provide protection from issues like over-current, over-voltage, excess temperature, stall operation, etc.

The central processing unit is an STM32G474RET6 type device that is a 170 MHz ARM Cortex-M4F based microcontroller with 512 KB Flash memory and 128 KB RAM memory.

The significant features making the chip perfect for motor control are the high-resolution timer, three independent 12-bit ADCs, and built-in operational amplifiers. What is more, the CORDIC algorithm is there as well.

The inverter operating on three-phase concept is made from six N-channel Types of power MOSFETs (IPP80N061S4-07, rated to work on 60V, 80A and 7 mΩ resistance at the ON state) with a standard three-phase bridge type configuration.

The inverter's DC link, powered by 48V DC typical input voltage, has a bulk capacitor of 470 microfarads and three 1 microfarads types of film capacitors placed at points where each half-bridge is connected so that switching signals are suppressed.

The gate driver was the DRV8323, a three-phase gate driver with integrated current-sense amplifiers, programmable dead time, and protection features including VDS monitoring and shoot-through prevention.

The printed circuit board had a four-layer configuration with a substrate ground plane between the second layer and a power plane on layer three.

The power circuit loop was small, about 15 mm long, and connected the DC electric capacitor to the high-side MOSFET to the low-side MOSFET and to the ground. The gate drive traces were of equal length to prevent any discrepancies in the switches time.

The DRV8323 provided three half-bridge gate drivers with 1 A source and 2 A sink current capability. Each high-side driver used a bootstrap capacitor (100 nF, X7R) charged during the low-side on-time.

The bootstrap diode was integrated, but an external fast-recovery diode (BAS16) was added in parallel to reduce charge time at high duty cycles. The gate drive voltage was regulated to 12 V by the DRV8323's internal charge pump, ensuring full MOSFET enhancement even at low DC link voltages.

Gate resistors were selected for regulated switching: 10 ohms in turn-on and 2.2 ohms in turn-off, and put a Schottky diode (BAT54) in parallel with the turn-on resistor to facilitate turn-off and lessen switching losses.

The dead time was programmed to be equal to 200 ns and it eliminated the occurrence of shoot-through while also limiting distortion at the frequency of 20 kHz in PWM. The driver contains the VDS sensing capability that had the function of monitoring the drain-source voltage when on; if the VDS got more than 1.5 V for more than 5 µs, a fault was latched, and the PWM outputs were disabled.

Current Sensing on Low Side utilized three shunt resistors (1 mΩ, 1% tolerance, 50 ppm/°C), one used per low side MOSFET source and ground.

The connections of Kelvin took differential voltage straight to the INA240 current sensing amplifiers having gain equalling twenty, and producing the 0-3.3 V output for currents of ±82.5 A. 400 kHz bandwidth of INA240 and adequate common mode rejection of more than 120 dB guaranteed reliable current sensing during PWM operation.

All three amplifier outputs were sampled in parallel using three STM32 ADCs that were activated by the HRTIM at the halfway point in each PWM cycle. This simultaneous sampling eliminated any switching noise and obtained average phase current readings.

The offset calibration was done when the motor was offline, storing zero-current readings into the firmware. Compensating for temperature drift was achieved with the use of on-board NTC thermistor and using a linear correction method.

The HRTIM created three pairs of PWM signals which are complementary and possess different pulses of the same magnitude, alternated at the rate of 20 kHz.

By employing the technique of center alignment, the level of harmonics in the output signals was lowered and the trigger of the ADC was generated exactly at the mid-period time, at which the rate of the current changes almost ceased.

The signals from PWM generators were taken to DRV8323 which imposed the desired amount of delay and took care about avoiding shoot-throughs.

For six-step commutation, the PWM duty cycle was applied only to the high-side MOSFET of the active phase, while the low-side MOSFET of the sinking phase remained fully on. The third phase was left floating.

This trapezoidal commutation matched the motor's back-EMF waveform, minimizing torque ripple. The HRTIM's fault input was connected to the DRV8323 fault pin, so any hardware fault immediately forced all PWM outputs to a high-impedance state.

Three Hall sensors were connected to a 5 V power supply with the inclusion of resistor and capacitor circuitry which helped to create a low-pass filter.

The filtered outputs were then relayed to the Schmitt-trigger inputs to the STM32 timer (TIM2) that was put in the Hall sensor mode.

Every time the Hall sensors were activated, the firmware system would produce an interrupt capturing the rotor speed and the direction.

Speed was computed using the capture-compare register value, which counted at 170 MHz, providing a resolution of 5.88 ns.

Over one full electrical revolution (six Hall states), the firmware accumulated the period and calculated RPM using the known pole pairs.

The Hall state also indexed a commutation table that defined which phases were energized and in which direction. This table was stored in Flash and could be updated for different motor configurations.

The speed loop used a PI controller with Kp = 0.02 and Ki = 0.5, generating a current reference from the speed error. A first-order low-pass filter with a 50 Hz cutoff smoothed the speed feedback.

Feedforward compensation added a duty cycle offset proportional to the speed setpoint, improving transient response. During startup, the controller operated in open-loop ramp mode until the Hall sensors produced valid commutation signals, then transitioned to closed-loop control.

Hardware protection was implemented at multiple levels. Overcurrent protection used the STM32's analog comparator, which monitored the shunt amplifier output and triggered the HRTIM fault input within 1 µs if current exceeded 30 A.

The DRV8323 provided VDS-based desaturation detection, undervoltage lockout, and overtemperature shutdown. A resistor divider on the DC link fed an ADC channel for overvoltage and undervoltage detection, with thresholds set at 60 V and 36 V respectively.

This brake chopper circuit has the function of dissipating the regenerative energy with the help of a MOSFET and a resistor when the DC link voltage reaches a value higher than 58 volts.

The stall detection was incorporated into the firmware to prompt the controller to cease operations and issue an alarm indication in case the current goes up more than 20 amps for more than 0.5 seconds while the speed remains below 100 rpm. All malfunctions were stored in the controller memory and it was required to clear it in either way: manually or via communication interface commands.

The design of the firmware employed interrupt-based real-time control along with a background loop that handled housekeeping functions.

The HRTIM interrupt with a frequency of 20kHz executed the current loop, the ADC readout, and the PWM update. Meanwhile, the speed loop took advantage of a timer interrupt of 1ms. In addition, CAN communication and logging of fault were undertaken by a FreeRTOS task operating at a low priority.

PI tuning used a method based on the concept of a model. The current control system was tuned by using a technique called pole-zero cancellation, with the value of the motor's electrical constant being used (L/R = 2 ms), the resulting proportional gain and integral gain were equal to 0.45 and 120, respectively.

The speed control loop was tuned by the Ziegler-Nichols method in regards to the closed-loop system and later optimized through an empirical method.

Dead-time compensation provided additional delay compensation depending on the phase current, thus minimizing the distortion at the zero-crossing point. In addition, a notch filter was utilized to suppress mechanical vibrations.

The controller was examined using a dynamometer with a programmable installation. Step response tests indicated a time of rise of speed 10–90% equal to 85 ms and overshoot less than 3%. Stability at rated load was 94.2%.

Thermal testing at 40°C of the surroundings shows that the case temperatures of MOSFETs do not exceed 85°C when used with forced air cooling.

Safety tests confirmed that overcurrent, overvoltage, and stall faults were identified and removed successfully. The controller passed the 500-hour endurance test without any errors.

It was shown in this project that the ARM Cortex-M4F microcontroller equipped with motor-control peripherals is able to provide the industrial standard of BLDC control that uses precise current sensing, reliable protection, and real-time determinism.

The main takeaways from this project include learning how to reduce inductance in power loops, recognizing the benefit of using synchronized ADC samples with PWM, and stressing the need for hardware fault inputs for rapid overcurrent protection.

The resulting controller fulfilled all performance and reliability criteria and was implemented in a production situation.